The present invention relates to a method for producing a silicon single crystal wafer with very few crystal defects on the surface and near the surface of the wafer, and a silicon single crystal wafer.
As wafers for producing devices such as semiconductor integrated circuits, CZ silicon single crystal wafers grown by the Czochralski method (CZ method) have been mainly used. If crystal defects are present in such CZ silicon single crystal wafers, pattern failure and the like will be caused during the semiconductor device production. In particular, since the pattern width required for the recent highly integrated devices has become extremely fine, i.e., 0.3 xcexcm or less, even the presence of defects of 0.1 xcexcm size may cause pattern failure at the time of such pattern formation, and it markedly reduces production yield of devices and degrades quality characteristics of devices. Therefore, the size of crystal defects present in silicon single crystal wafers must be made small as much as possible.
Recently, in particular, it has been reported that, in silicon single crystals grown by the CZ method, crystal defects called grown-in defects introduced during the crystal growth are detected by various measurement methods. For example, in commercially produced single crystals pulled at a usual growth rate (for example, about 1 mm/min or higher), they can be detected by using a commercially available particle counter (for example, SP1 produced by KLA/Tencor Co., Ltd.) as crystal originated particles (COP).
The cause of the generation of such crystal defects is considered to be clusters of atomic holes aggregated during the production of single crystals or oxide precipitates which are aggregates of oxygen atoms introduced from quartz crucibles. If these crystal defects exist in surface layers (0-5 xcexcm) of wafers in which devices are formed, they act as harmful defects degrading the device characteristics. Therefore, there have been investigated various methods for reducing such crystal defects.
For example, it has been known that, in order to reduce the density of the aforementioned atomic hole clusters, crystals can be grown at an extremely reduced crystal growth rate (for example, 0.45 mm/min or lower, see Japanese Patent Application Laid-open (Kokai) No. 8-330316). In this method, however, crystal defects considered to be dislocation loops formed by aggregated excessive interstitial silicon are newly generated, and markedly degrade the device characteristics. Thus, it has become clear that the method cannot be a solution of the problem. Moreover, since the method uses a crystal growth rate reduced from the conventional rate of about 1.0 mm/min to 0.4 mm/min or lower, it markedly reduces the productivity of single crystals and increases the cost.
Further, as another method, there has also been proposed a method comprising a heat treatment of wafers grown at a commercially used usual conventional crystal growth rate of about 1.0 mm/min or higher in a hydrogen atmosphere to eliminate the grown-in defects, and it is used for the actual production. However, it has been pointed out that this method sill leaves the defects in surface layers (0-5 xcexcm from the surfaces).
Furthermore, in the aforementioned method, it is necessary to secure safety after the heat treatment in a hydrogen atmosphere by replacing the atmosphere in the heat treatment furnace with nitrogen gas and then taking out the wafers. However, a small amount of oxygen and moisture contained in the nitrogen gas may locally etch the wafer surfaces, and thus the method also suffers from a problem that surface roughness such as haze and microroughness may be degraded.
The term xe2x80x9chazexe2x80x9d used herein means periodical surface roughness having a period of several to several tens of nanometers on the wafer surfaces, and it can be determined semi-quantitatively by scanning whole surfaces of wafers with a particle counter mainly utilizing a laser, and measuring intensity of scattered reflection thereof.
On the other hand, microroughness is surface roughness evaluated as a Pxe2x88x92V (peak to valley) value or RMS (root mean square roughness) value in a fine area (e.g., 2 xcexcm square), which are obtained by investigating the area with an atomic force microscope.
The present invention has been accomplished in view of the aforementioned problems, and its major object is to obtain silicon single crystal wafers for semiconductor devices of high quality from a silicon single crystal ingot produced by the CZ method with high productivity. In the silicon single crystal wafers, grown-in defects in their surface layers are effectively reduced or eliminated, and the wafers are also excellent in the wafer surface roughness.
In order to achieve the aforementioned object, the present invention provides a method for producing a silicon single crystal wafer, which comprises growing a silicon single crystal ingot by the Czochralski method, slicing the single crystal ingot into a wafer, subjecting the wafer to a heat treatment at a temperature of 1100-1300xc2x0 C. for 1 minute or more under a non-oxidative atmosphere, and successively subjecting the wafer to a heat treatment at a temperature of 700-1300xc2x0 C. for 1 minute or more under an oxidative atmosphere without cooling the wafer to a temperature lower than 700xc2x0 C.
By the aforementioned method for producing a silicon single crystal wafer, which comprises growing a silicon single crystal ingot by the Czochralski method, slicing the single crystal ingot into a wafer, subjecting the wafer to a heat treatment at a temperature of 1100-1300xc2x0 C. for 1 minute or more under a non-oxidative atmosphere, and successively subjecting the wafer to a heat treatment at a temperature of 700-1300xc2x0 C. for 1 minute or more under an oxidative atmosphere without cooling the wafer to a temperature lower than 700xc2x0 C., grown-in defects in the wafer surface layer, which are harmful to the semiconductor device production, can be eliminated or reduced within a short period of time. Simultaneously, a silicon single crystal wafer for semiconductor devices of high quality excellent in the wafer surface roughness can be obtained with high productivity.
In the aforementioned method, the non-oxidative atmosphere is preferably argon, nitrogen or a mixed gas of argon and nitrogen.
This is because argon, nitrogen or a mixed gas of argon and nitrogen has an advantage that it is easy to be handled and inexpensive.
In the aforementioned method, the oxidative atmosphere may be an atmosphere containing water vapor.
By using an atmosphere containing water vapor as the oxidative atmosphere as mentioned above, a high oxidation rate can be obtained, and thus interstitial silicon can efficiently be injected within an extremely short period of time to eliminate the defects. In addition, since the oxide film formed on the surface becomes relatively thick, it is suitable for applications in which the oxide film is used as it is in the wafer processing process or the device production.
In the aforementioned method, the oxidative atmosphere may also be a dry oxygen atmosphere or a mixed gas atmosphere of dry oxygen and argon or nitrogen.
By using a dry oxygen atmosphere or a mixed gas atmosphere of dry oxygen and argon or nitrogen as the oxidative atmosphere as mentioned above, a slow growth rate of the oxide film can be obtained, and thus the oxide film formed on the surface after the heat treatment can be made thin. Therefore, when the formed oxide film must be eliminated with an aqueous solution of HF or the like, the time required for this step can be shortened.
Thickness of an oxide film formed by the heat treatment under the oxidative atmosphere is preferably controlled to be 20-100 nm.
If the thickness of the oxide film formed by the heat treatment under the oxidative atmosphere is 20 nm or more, COPs in the wafer surface layer can sufficiently be eliminated. If it is 100 nm or less, even when the formed oxide film must be eliminated, time required for that step can be shortened.
Moreover, an oxide film may preliminarily be formed on the wafer surface before performing the heat treatment under a non-oxidative atmosphere.
If such an oxide film is formed, the wafer surface can be protected from formation of thermal nitride film on the wafer surface and surface roughening by etching due to the heat treatment.
In this case, furthermore, thickness of a thermal oxide film formed on the wafer surface after the heat treatment under an oxidative atmosphere is preferably controlled to be 300 nm or more.
By growing a thermal oxide film having a thickness of 300 nm or more through the heat treatment under an oxidative atmosphere, COPs on the wafer surface can be eliminated by reflow of silicon oxide during the growth of the oxide film even when the oxide film is preliminarily formed on the wafer surface before performing the heat treatment under a non-oxidative atmosphere. Therefore, COPs on the wafer surface can more surely be eliminated.
Moreover, when the silicon single crystal ingot is grown by the Czochralski method, the cooling rate of the single crystal ingot between 1150-1080xc2x0 C. is preferably controlled to be at 2.3xc2x0 C./min ore more.
By controlling the cooling rate of the single crystal ingot between 1150-1080xc2x0 C. to be at 2.3xc2x0 C./min or more when the silicon single crystal ingot is grown by the Czochralski method, a wafer having grown-in defects of a reduced size can further be subjected to the heat treatment of the present invention, and thus the grown-in defects in the wafer surface layer can more effectively be eliminated or reduced. Therefore, silicon single crystal wafers for semiconductor devices of higher quality can be obtained with high productivity.
In this case, when the silicon single crystal ingot is grown by the Czochralski method, the silicon single crystal ingot is preferably doped with nitrogen.
If a silicon single crystal ingot is doped with nitrogen when the silicon single crystal ingot is grown by the Czochralski method, a wafer having grown-in defects of a reduced size due to the nitrogen doping can further be subjected to the heat treatment of the present invention, and thus the grown-in defects in the wafer surface layer can more effectively be eliminated or reduced. Therefore, silicon single crystal wafers for semiconductor devices of higher quality can be obtained with high productivity.
In this case, when the silicon single crystal ingot doped with nitrogen is grown by the Czochralski method, the nitrogen concentration doped in the single crystal ingot is preferably controlled to be 1xc3x971010 to 5xc3x971015 atoms/cm3.
This is because the concentration is desirably 1xc3x971010 atoms/cm3 or higher in order to sufficiently suppress the growth of grown-in defects, and it is preferably 5xc3x971015 atoms/cm3 or less in order not to inhibit single crystallization of the silicon single crystal.
Furthermore, when the silicon single crystal ingot is grown by the Czochralski method, the oxygen concentration in the single crystal ingot is preferably controlled to be 18 ppma or less according to the standard of JEIDA (Japan Electronic Industry Development Association).
Such a low oxygen concentration can further inhibit the growth of crystal defects, and also prevent the formation of oxide precipitates in the surface layer.
A silicon single crystal wafer produced by the production method of the present invention should be, for example, a CZ silicon single crystal wafer wherein density of COPs having a size of 0.09 xcexcm or more in a surface layer having a thickness of up to 5 xcexcm from a surface is 1.3 COPs/cm2 or less, and the density of COPs having a size of 0.09 xcexcm or more in a bulk portion other than the surface layer is larger than the density of COPs of the surface layer.
Such a silicon single crystal wafer should be a wafer with extremely few crystal defects on the wafer surface and in the wafer surface layer, and thus a silicon single crystal wafer for semiconductor devices of high quality which is excellent in electric characteristics. On the other hand, the bulk portion of the wafer should have sufficient gettering effect, because of the COP density larger than that of the surface layer. Therefore, production yield or quality characteristics of devices can be improved.
Furthermore, the silicon single crystal wafer of the present invention may have, for example, haze on the wafer surface of 0.1 ppm or less, and microroughness in a measurement area of 2 xcexcm square of 1.0 nm or less in terms of the Pxe2x88x92V value.
Thus, the single crystal wafer of the present invention can be one characterized not only by few crystal defects on the wafer surface and in the surface layer, but also by excellent surface roughness on the wafer surface.
As described above, according to the present invention, by successively performing the heat treatment at an elevated temperature under a non-oxidative atmosphere, and the heat treatment under an oxidative atmosphere, grown-in defects in a wafer surface layer can be eliminated or reduced at a lower temperature with a shorter period of time compared with conventional techniques, and moreover, the surface roughness of the wafer can be improved. Furthermore, the elimination or reduction of grown-in defects can be made more effectively by the control of the crystal cooling rate during the CZ crystal pulling and the doping with nitrogen impurities.
In addition, when the heat treatments are performed without using hydrogen gas, which suffers from a risk of explosion, the heat treatments can be performed comparatively safely using a usual heat treatment furnace, without considering special safety measures unlike conventional heat treatment apparatuses which use hydrogen gas.